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24 Channels ADC, Mixed Sampling Rate

  • Sixteen channel of TI ADS42JB69 ADC 16-bit @ 250MSPS
  • Eight channel SAR TI ADS8568 ADC 16-bit @ 650 KSPS simultaneous
  • Interface to the FPGA is via JESD204B
  • 24 LVDS for Clock/Trig and/or GPIO
  • Virtex-7 FPGA 415T or 690T in FFG1158

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The AMC521 utilizes eight dual channel ADS42JB69 ADC converters at 250 MSPS with 16-bit resolution for 16 high sampling rate channels. In addition the module has eight 16-bit Successive Approximation Register (SAR) based on TI ADS8568 ADC at a lower sampling rate for measurements to 650 KSPS. There are also 24 LVDS I/O which can be used for Clock In/Out, Trig In/Out or GPIO.

The AMC521 has an M-LVDS Cross Bar Switch (CBS) for clock distribution which allows clocking from front panel, backplane, or on-board VCXO. The clock outputs to the backplane for distribution to other modules. The AMC521 has a Virtex-7 FPGA with option of 415T or 690T in FFG1158 package.

The AMC ports 4-7 and 8-11 are routed to the FPGA for PCIe, XAUI, SRIO, or other SerDes protocols. AMC ports 0, 1 and 2, 3 are also routed to the FPGA for base channel and storage point-to-point connectivity.

Key Features
  • Sixteen channel of TI ADS42JB69 ADC 16-bit @ 250MSPS
  • Eight channel SAR TI ADS8568 ADC 16-bit @ 650 KSPS simultaneous
  • Interface to the FPGA is via JESD204B
  • 24 LVDS for Clock/Trig and/or GPIO
  • Virtex-7 FPGA 415T or 690T in FFG1158
Benefits
  • Low Jitter Clock distribution via an M-LVDS Cross Bar Switch
  • Backplane TCLKA, TCLKB, TCLKC, TCLKD, and FCKLA
  • On-board VCXO
  • Design utilizes proven VadaTech subcomponents and engineering techniques
  • Electrical, mechanical, software, and system-level expertise in house
  • Full ecosystem of front and rear boards, enclosures, specialty modules, and test/dev products from one source
  • AS9100 and ISO9001 certified company
Specifications
Specifications

Block diagram

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