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FMC Dual ADC, 12-bit @ 2.6 GSPS with single DAC 14-bit @ 5.7GSPS

  • Dual AD9625 ADC
    • 4/6 JESD204B lanes from the ADC is routed to the FMC
    • 12-bit @ 2.6 GSPS
    • Wide full power bandwidth supports IF sampling of signals up to 2 GHz
  • Single DAC AD9129 
    • 14-bit @ 5.7 GSPS
  • FPGA Mezzanine Card (FMC) per VITA 57
  • Excellent dynamic performance
  • Front panel interface includes CLK In, Trig In and Trig Out

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The FMC227 is an FPGA Mezzanine Carrier (FMC) per VITA 57 specification. The board has dual ADC and single DAC. The first ADC routes 6 lanes of JESD204B and the second ADC routes only 4 lanes.

The FMC227 utilizes dual AD9625 ADCs providing 12-bit conversion rates of up to 2.6 GSPS and a single DAC AD9129 providing 14-bit conversion rates of up to 5.6 GSPS.

The analog input, digital output, clock and trigger interfaces of the FMC227 are routed via SSMC connectors. The internal clock frequency is programmable and the clock is capable of locking to an external reference.

Key Features
  • Dual AD9625 ADC
    • 4/6 JESD204B lanes from the ADC is routed to the FMC
    • 12-bit @ 2.6 GSPS
    • Wide full power bandwidth supports IF sampling of signals up to 2 GHz
  • Single DAC AD9129 
    • 14-bit @ 5.7 GSPS
  • FPGA Mezzanine Card (FMC) per VITA 57
  • Excellent dynamic performance
  • Front panel interface includes CLK In, Trig In and Trig Out
Benefits
  • High dynamic range for versatility in video/broadcast requirements
  • Ideal for Broadband communications systems, Wireless infrastructure, LTE, ATE, RADAR/Jamming
  • Compatible with a broad range of Xilinx- and Altera-based FMC carriers from VadaTech and others
  • Electrical, mechanical, software, and system-level expertise in house
  • Full system supply from industry leader
  • AS9100 and ISO9001 certified company
Specifications
Specifications

Block diagram

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