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FMC Dual ADC 12-bit 2.6 GSPS, Single DAC 16-bit 12 GSPS

NEW
  • Dual AD9625 ADC 12-bit at 2.6/2.5/2.0 GSPS
  • 8 JESD204B lanes from each ADC is routed to the FMC+ connector
  • Single DAC AD9164/AD9162 16-bit 12 GSPS
  • FPGA Mezzanine Card (FMC+) per VITA 57.4
  • Excellent dynamic performance
  • Front panel interface includes CLK In, Trig In and Trig Out

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The FMC250 is an FPGA Mezzanine Card (FMC+) per VITA 57.4 specification. The board has dual ADC and single DAC.

The FMC250 utilizes dual AD9625 ADCs providing 12-bit conversion rates of up to 2.6 GSPS and a single DAC (AD9162 or AD9164) providing 16-bit conversion rates of up to 12 GSPS.

The analog input, digital output, clock and trigger interfaces of the FMC250 are routed via SSMC connectors. The internal clock frequency is programmable and the clock is capable of locking to an external reference.

Key Features
  • Dual AD9625 ADC 12-bit at 2.6/2.5/2.0 GSPS
  • 8 JESD204B lanes from each ADC is routed to the FMC+ connector
  • Single DAC AD9164/AD9162 16-bit 12 GSPS
  • FPGA Mezzanine Card (FMC+) per VITA 57.4
  • Excellent dynamic performance
  • Front panel interface includes CLK In, Trig In and Trig Out
Benefits
  • Ideal for Broadband communications systems,Wireless infrastructure, LTE, ATE, RADAR /Jamming
  • Compatible with a broad range of Xilinx and Altera based FMC carriers from VadaTech and others
  • Electrical, mechanical, software, and system-levelexpertise in house
  • Full system supply from industry leader
  • AS9100 and ISO9001 certified company
Specifications
Specifications

Block diagram

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