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Quad DAC @ 12 GSPS with Quad ADC @ 3 GSPS, UltraScale+™ AMC

NEW
  • Xilinx UltraScale+™ XCVU13P FPGA
  • Quad ADC channels (AD9208) 14-bits @ 3 GSPS
  • Quad DAC channels (AD9162 or AD9164) 16-bits @ 12 GSPS
  • Single bank of DDR4 Memory 64-bit wide
  • AMC Ports 4-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (protocols such as PCIe, SRIO, 1/10/40GbE, etc. are FPGA programmable)
  • AMC FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed
  • Clock Jitter cleaner
  • Option for Direct RF Clock sampling for the ADC/DAC
  • IPMI 2.0 compliant

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The AMC589 provides quad ADC with sample rates of up to 3 GSPS (AD9208) at 14-bits and a quad DAC (Analog Devices AD9162 or AD9164) with update rates of up to 12 GSPS and direct RF synthesis at 6 GSPS, 16-bits making it suitable for signal capture/analysis applications such as COMINT/SIGINT, radar, research and instrumentation.

The unit has an on-board, re-configurable UltraScale+™ XCVU13P FPGA which interfaces directly to ADC/DAC.

The FPGA has interface to a single bank of DDR4 memory channels (64-bit wide for a total of 8 GB). This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host. The AMC598 comes with 8HP panel size (it will occupy two mid-size slots in a chassis).

Key Features
  • Xilinx UltraScale+™ XCVU13P FPGA
  • Quad ADC channels (AD9208) 14-bits @ 3 GSPS
  • Quad DAC channels (AD9162 or AD9164) 16-bits @ 12 GSPS
  • Single bank of DDR4 Memory 64-bit wide
  • AMC Ports 4-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (protocols such as PCIe, SRIO, 1/10/40GbE, etc. are FPGA programmable)
  • AMC FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed
  • Clock Jitter cleaner
  • Option for Direct RF Clock sampling for the ADC/DAC
  • IPMI 2.0 compliant
Benefits
  • Closely coupled ADC and DAC for low-latency response, dual channel for I/Q
  • Sampling rate >6 GSPS for radar and EW applications
  • Xilinx UltraScale+™ XCVU13P FPGA provides powerful compute resource
  • Electrical, mechanical, software, and system-level expertise in house
  • Full system supply from industry leader
  • AS9100 and ISO9001 certified company
Specifications
Specifications

Block diagram

Block diagram

Related Products

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  • Two banks of 64-bit wide and a single bank of 32-bit wide DDR-4
    • for a total of 20 GB
  • AMC Ports 4-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (protocols such as PCIe, SRIO, 1/10/40GbE, etc. are FPGA programmable)
  • AMC FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed
  • Clock jitter cleaner
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  • Supports up to six single module mid-size
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View product VT951 Data Sheet

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