FPGA

 

DAQ Series

VadaTech has developed the DAQ Series software to simplify and accelerate the development of data acquisition systems. Based on a digitizer-client-server architecture, the DAQ Series software leverages open source components to shorten the time developers spend integrating a data acquisition system. Customers can use proven and supported IP cores from VadaTech along with open source code to quickly customize a digitizer for their application.

 

Data acquisition systems are used in applications such as military signals intelligence (SIGINT), experimental particle accelerators, test and measurement, diagnostics, condition monitoring and industrial automation. VadaTech’s DAQ Series software offers a Windows or Linux GUI for the simplest development or can be integrated with larger applications using the Experimental Physics and Industrial Control System (EPICS).

 

                   

 

 

This gives developers full flexibility to implement a standalone digitizer with GUI, an EPICS input/output controller (IOC) or customize the software to suit their specific application. VadaTech has identified six typical usage scenarios and provides sample designs with source code for these typical usage models to give developers the fastest start in building a data acquisition system:

 

 

 

  • Standalone digitizer, with GUI
  • EPICS IOC digitizer
  • Custom processing / trigger in the digitizer (created via Simulink®/Sysgen)
  • Standalone mode (custom application accessing directly DAQ System library)
  • Custom processing / trigger in the digitizer (created in VHDL/Verilog)
  • Custom application using DAQ Series as a pool of hardware/software IP

 

 

 

 

DAQ_Series supports the AMBA® AXI4 Plug-and-Play IP offering a single standard interface to make IP integration easier. Xilinx offers a broad set of AXI4 based IP with a single open standard interface across the Embedded, DSP, and Logic domains.

 

VHDL

VHSIC Hardware Description Language or VHDL is a hardware description language used in embedded systems to model and program digital and mixed-signal systems such as FPGAs and CPUs. VHDL allows the behavior of the required system to be modeled and simulated for verification prior to deployment in real hardware.

 

VadaTech provides a reference design implementation for our FPGAs complete with royalty-free VHDL code, documentation and configuration binaries to support developers in bringing up systems.

 

The reference design focuses on the I/O ring of the FPGA to demonstrate low-level operation of the interconnections between the FPGA and other circuits on the board and/or backplane. It is geared to prove out the hardware for engineering/factory diagnostics and customer acceptance of the hardware, but it does not strive to implement a particular end application.

 

JSM & Virtual Probe

When a system is composed of several boards, making a large chain of all programmable devices is not practical. The MicroTCA specification defines the JTAG connections on the AMC modules and an appropriate backplane, that can be optionally connected to a JTAG Switch Module (JSM), providing independent access to chains of all the boards in the system. While the specification allows for a JSM, not all vendors implement this technology. 

 

The VadaTech UTC008 JSM allows a single JTAG connection to be routed to any of the slots in a MicroTCA chassis to simplify prototyping, debugging and software updates. It provides JTAG vector testing of all slots in a system using a single module.

 

In addition to the capabilities provided by the UTC008 JSM, VadaTech has implemented Virtual Probe services on the UTC004 MicroTCA Carrier Hub to provide JTAG via Ethernet for specific vendors such as Xilinx and Altera. This allows a user to connect to a system via Ethernet and then use standard FPGA development tools, such as Xilinx iMPACT/ChipScope and Altera Programmer/SignalTap, to treat the MCH/JSM combination as if it was a standard JTAG probe and behave as if the developer were directly connected to the system via JTAG. This approach frees the developer from having to attach JTAG probes directly to the AMC or JSM which can be difficult when systems are already fully assembled. It also allows for remote debugging across long distances when required without the need to install additional JTAG equipment on-site.