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Zynq UltraScale+ FPGA, FMC+ Carrier, VPX

  • Xilinx UltraScale+ XCZU19EG FPGA
  • Single FMC+ (VITA 57.4) site
  • 8 GB of 64-bit wide DDR4 Memory (single bank) with ECC (CPU)
  • 8 GB of 64-bit wide DDR4 Memory (single bank, FPGA)
  • MPSoC with block RAM and UltraRAM
  • Health Management through dedicated Processor

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The VPX585 is a 3U VPX FPGA Carrier with single FMC+ (VITA-57.4)interface. The unit has an on-board, re-configurable FPGA which interfacesdirectly to the VPX P1 connector and all FMC+ LA/HA/HB pairs (the moduledoes not support HSPCe connector).

The FPGA has interface to a single DDR4 memory channel (64-bit wide withECC to the ARM CPU). In addition there is 64GB of DDR4 memory channelthat connects to the FPGA. This allows for large buffer sizes to be storedduring processing as well as for queuing the data to the host.

The VPX is based on Xilinx UltraScale+ XCZU19EG MPSoC FPGA withsingle FMC+ site. The FPGA has 1968 DSP Slices and 1143k logic cells. TheXCZU19EG includes quad-core ARM application processor, dual-core ARMreal-time processor and Mali™ graphics processing unit, as well as over 34.6Mb of block RAM and 36 Mb of UltraRAM.

The module has on board 64 GB of Flash, 128 MB of boot flash and an SDCard as an option.

Key Features
  • Xilinx UltraScale+ XCZU19EG FPGA
  • Single FMC+ (VITA 57.4) site
  • 8 GB of 64-bit wide DDR4 Memory (single bank) with ECC (CPU)
  • 8 GB of 64-bit wide DDR4 Memory (single bank, FPGA)
  • MPSoC with block RAM and UltraRAM
  • Health Management through dedicated Processor
Benefits
  • FMC+ site on a single module VPX
  • Zynq UltraScale+ MPSoC
  • Electrical, mechanical, software, and system-level expertise in house
  • Full system supply from industry leader
  • AS9100 and ISO9001 certified company
Specifications
Specifications

Block diagram

Related Products

VPX592

FPGA/FMC Carrier, Kintex UltraScale™, 3U VPX

  • 3U FPGA carrier for FPGA Mezzanine Card (FMC) per VITA 46 and VITA 57
  • Xilinx Kintex UltraScale™  XCKU115 FPGA
  • High-performance clock jitter cleaner
  • VHDL reference design with source code
  • Protocols such as PCIe, SRIO, 10GbE/40GbE, etc. are FPGA programmable
  • Compatible with VadaTech and 3rd party FMCs
  • 20 GB of DDR-4 Memory (2 banks of 64-bit wide, and single bank of 32-bit wide)
  • Health Management through dedicated Processor
View product VPX592 Data Sheet

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