AMC511

AMC511 is a Quad ADC (Analog to Digital Converter) module compliant to the AMC.1* and AMC.2 specification. The unit has an on-board, re-configurable FPGA which interfaces directly to the GbE or PCIe bus. The FPGA has an interface to the QDR-II memory (36 and 72-bit wide). This allows for largebuffer sizes to be stored during processing as well as for queuing the data to the host. The AMC511 allows for external clocking as well as internal clocking. The clock goes through an on-board PLL forbuffering/multiplying and jitter cleaner.

The AMC511 has a Trig in/out signal. Each input/output is via an SMB style connector and each of the ADC single ended inputs are converted to differential. The FPGA interfaces directly to the AMC per AMC.1 and/or AMC.2. These interfaces allow customers to use the core to interface to the host with multiple protocols*.*Default configuration is AMC.1 x4 with GbE.

Default configuration is AMC.1 x4 with GbE.