VPX552
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Xilinx Kintex UltraScale™ with Intel® Xeon™ SoC, 6U VPX
- Intel Broadwell-D integrated with Xilinx Kintex UltraScale™ XCKU115 FPGA
- Intel® 5th Generation Xeon System-on-Chip (SoC)
- CPU 32 GB of DDR4 with ECC
- FPGA 16 GB of DDR4
- XMC site
- 5 for optical to rear
- Health Management through dedicated Processor
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The VPX552 is a 6U VPX board with Kintex UltraScale™ FPGA and Intel® 5th generation Xeon 4-core, 8-core or 16-core Processor (Broadwell-D).
The efficient SoC design has low power consumption and integrated PCH technology. The processor has 32 GB of dual-bank DDR4 memory with ECC and Flash for the OS with Trusted Platform Management (TPM). The VPX552 has four 10GbE route to the rear via VITA 66.5 optical.
The BIOS allows booting from onboard Flash (SATA) or PXE boot of the OS via any of its Ethernet Ports.
The onboard FPGA is a Kintex UltraScale™ with 16 GB of dual-bank DDR4 Memory. High speed SERDES are routed to the rear (copper via P1 and P2, optical via VITA 66.5). GPIO signals are routed to the rear as LVDS and M-LVDS.
An XMC site is supported by PCIe x8 and has I/O routed to the rear per VITA 46.9 as xD12.
The health management is based on the VITA 46.11.
The unit is available in a range of temperature and shock/vib specifications per ANSI/VITA 47, up to V3 and OS2.
Please contact VadaTech for details of Conduction Cooled versions.
Key Features
- Intel Broadwell-D integrated with Xilinx Kintex UltraScale™ XCKU115 FPGA
- Intel® 5th Generation Xeon System-on-Chip (SoC)
- CPU 32 GB of DDR4 with ECC
- FPGA 16 GB of DDR4
- XMC site
- 5 for optical to rear
- Health Management through dedicated Processor
Benefits
- Electrical, mechanical, software, and system-level expertise in house
- Full system supply from industry leader
- AS9100 and ISO9001 certified company
Specifications
Block diagram
Related Products
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- VHDL reference design with source code
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- 2.5 GB of DDR3 Memory
- Health Management through dedicated Processor
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VPX516 Data Sheet
VPX592
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- Xilinx Kintex UltraScale™ XCKU115 FPGA
- High-performance clock jitter cleaner
- VHDL reference design with source code
- Protocols such as PCIe, SRIO, 10GbE/40GbE, etc. are FPGA programmable
- Compatible with VadaTech and 3rd party FMCs
- 20 GB of DDR4 Memory (2 banks of 64-bit wide, and single bank of 32-bit wide)
- Health Management through dedicated Processor
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VPX592 Data Sheet
VPX599
Dual ADC @ 10.4 or 6.4 GSPS and Dual DAC @ 12 GSPS, UltraScale™, 3U VPX
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- Option for ADC12DJ5200, ADC12DJ3200 or ADC12DJ2700
- Dual DAC 16-bit @ 12 GSPS (AD9162 or AD9164) or TI DAC38RF82 14-bit @ 9GSPS
- High-performance clock jitter cleaner
- VHDL reference design with source code
- Protocols such as PCIe, SRIO, 10GbE/40GbE, etc. are FPGA programmable
- 16 GB of DDR4 Memory (64-bit wide)
- Health Management through dedicated Processor
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VPX599 Data Sheet
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