AMC565

The AMC565 has an integrated NVIDIA Jetson AGX Xavier, a Xilinx Kintex UltraScale+™ XCKU11P FPGA with an SOFI (Serial Optimized FPGA Interface) slot. The AMC is compliant to AMC.1, AMC.2 and AMC.4 PICMG open standard specifications.

The unit has an onboard, re-configurable Xilinx Kintex UltraScale+™ XCKU11P FPGA with 2,928 DSP Slices and 653K logic cells. It interfaces directly to the backplane clock lanes FCLKA and TCLKA-D, to the backplane dual x4 SERDES or single x8 SERDES lanes per ordering option F (AMC.1 and AMC.4), as well as 32 lanes of SERDES to the SOFI. The FPGA has an interface to 8 GB of DDR4 memory (dual 2x 32-bit wide). This allows for a large buffer size to be stored during processing as well as for queuing the data to the host. The FPGA is linked to the Jetson via PCIe x8 lanes at Gen3 speed.

The Jetson AGX Xavier has a 32 TeraOPS (TOPS) of peak compute, 512-Core NVIDIA Volta GPU with 64 Tensor cores, 8-core NVIDIA Carmel Arm V.8.2 64-bit CPU and 32GB of LPDDR4. It has a link to an SDHC Socket for 64GB of additional memory (per ordering option D) as well as to an M.2 NVMe for mass storage (per ordering option B).

The backplane dual GbE link (AMC.2) can be routed either to the FPGA or to the NVIDIA GbE via onboard MUX.