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AMC561

FPGA Carrier for Dual FMC with Virtex-7, AMC

  • AMC FPGA carrier for Dual FPGA Mezzanine Card (FMC) per VITA 57
  • Xilinx Virtex-7 690T FPGA in FFG-1761 package
  • Double module, mid-size (full-size optional)
  • AMC Ports 4-7 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (protocols such as PCIe, SRIO, XAUI, etc. are FPGA programmable)
  • AMC FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed
  • M-LVDS to Ports 17-20 per MTCA.4
  • Option for on-board Freescale QorIQ PPC2040
  • Serial over LAN (SOL) with hardware Random Number Generator (RNG)

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The AMC561 is an AMC FPGA Carrier with dual FMC (VITA 57) interfaces. TheAMC561 is compliant to the AMC.1, AMC.2 and/or AMC.4 specification. The unit hasan on-board, re-configurable FPGA which interfaces directly to the AMC FCLKA,TCLKA-D, FMC DP0-9 and all FMC LA/HA/HB pairs. The FPGA has interface to DDR3memory channels (64-bit wide and 16-bit wide).

Ports 12-15 support high-speed SERDES for direct board-to-board communication incompatible chassis, while Ports 17-20 support M-LVDS per MTCA.4.

The AMC561 has Dual FMC sites per VITA 57 allowing the versatility of various FMCmodules to be implemented.

The optional on-board quad core P2040 can run at 1.2 GHz with 1 GB of DDR3, 128MB of Boot Flash, and a 32 GB SD Card. The PPC has 4x PCIe interface to the FPGAin addition to its local bus. The PPC has its dual GbE routed to Ports 0 and 1 of the AMC via a mux to allow FPGA routing as well.

The AMC561 has Serial over LAN (SOL) per IPMI specification. It has a hardwareRNG for secure session.

Key Features
  • AMC FPGA carrier for Dual FPGA Mezzanine Card (FMC) per VITA 57
  • Xilinx Virtex-7 690T FPGA in FFG-1761 package
  • Double module, mid-size (full-size optional)
  • AMC Ports 4-7 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (protocols such as PCIe, SRIO, XAUI, etc. are FPGA programmable)
  • AMC FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed
  • M-LVDS to Ports 17-20 per MTCA.4
  • Option for on-board Freescale QorIQ PPC2040
  • Serial over LAN (SOL) with hardware Random Number Generator (RNG)
Benefits
  • Dual FMC sites on a double module AMC
  • Xilinx Virtex-7 690T FPGA in FFG-1761 package
  • Bank of 64-bit DDR3 memory allows larger buffer sizes while processing and queuing data to the host
  • Bank of 16-bit DDR3 memory (i.e. MicroBlaze memory option)
  • Electrical, mechanical, software, and system-level expertise in house
  • Full system supply from industry leader
  • AS9100 and ISO9001 certified company
Specifications
Specifications

Block diagram

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