FMC117

The FMC117 is a FPGA Mezzanine Card (FMC) compatible with VITA 57.1 FMC carriers. It has four zSFP+/SFP28 cages which allows for quad optics to be routed to DP0+/- to DP3+/-pins.

The FMC117 is protocol-agnostic and has a low jitter fractional PLL which can lock to CLK2 and CLK3 coming from the Carrier or be free running. The fractional PLL can generate two separate clocks to the two GBT clock pins and can provide two more additional clocks on CLK0 and CLK1 for the carrier.

The module has on board Multi-Rate Re-timer with Integrated Signal Conditioning, tuneable per lane. All channels lock independently from 20.2Gbps to 28.4 Gbps (including sub-rates such as 10.1376, 10.3125, 12.5, etc.). The module cannot run slower than 5.05Gbps. Adaptive Continuous Time Linear Equalizer (CTLE) with Adaptive Decision Feedback Equalizer (DFE).

The FMC117 panel must be integrated as a monolithic panel with the carriers such as AMC, VPX, etc. The FMC117 does NOT come with an FMC panel.