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Altera Carrier for FMC, Stratix-10™, SoC

  • Altera Stratix-10 SOC (System On Chip)
  •  Option for SX1650 or SX2800
  • AMC Ports 4-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4
  • AMC Ports 12-15 and 17-20 are routed to the FPGA
  • Single module, mid-size AMC (full-size optional)
  • AMC FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed
  • Clock jitter cleaner
  • 16 GB of DDR-4 (dual bank of 64-bits)

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The AMC537 is based on the Altera Stratix-10™ SOC SX1650 / 2800 FPGA with integrated quad-core ARM Cortex-A53.The AMC537 is compliant to the AMC.1, AMC.2, AMC.3 and/or AMC.4 specification.

The module routes all LA/HA/HB and 10 DP SERDES to the FMC slot. The on-board, re-configurable FPGA interfaces directly to the AMC FCLKA and TCLKA–D via a Cross Bar Switch (CBS) MLVDS.

The FPGA has two banks of DDR4, 64-bit wide, with 16 GB total memory. This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host.

The integrated quad ARM A53 core runs at 1.5 GHz with its owndedicated 2 GB of DDR4 memory. The module also has 4 GB of eMMC Flash.

 

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Key Features
  • Altera Stratix-10 SOC (System On Chip)
  •  Option for SX1650 or SX2800
  • AMC Ports 4-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4
  • AMC Ports 12-15 and 17-20 are routed to the FPGA
  • Single module, mid-size AMC (full-size optional)
  • AMC FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed
  • Clock jitter cleaner
  • 16 GB of DDR-4 (dual bank of 64-bits)
Benefits
  • Stratix-10 SOC FPGA
  • Dual Bank of 64-bit wide DDR4 memory allows larger buffer sizes while processing and queuing data to the host
  • Electrical, mechanical, software, and system level expertise in house
  • Full system supply from industry leader
  • AS9100 and ISO9001 certified company
Specifications
Specifications

Block diagram

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