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You are here: HomeProductsVPXA/D & D/A

A/D & D/A

VPX FPGA A/D D/A

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VPX587

300 MHz to 6 GHz Octal Versatile Wideband Transceiver (MIMO), Virtex UltraScale+™, 3U VPX

Xilinx Virtex UltraScale+™ XCVU13P FPGA
Four AD9371s or AD9375s on one module
Octo complete transceiver signal chain solution
Tx synthesis bandwidth to 250 MHz
Rx bandwidth: 8 MHz to 100 MHz
Health Management through dedicated Processor

View product VPX587 Data Sheet

VPX582

Integrated Octal RF Transceiver in for L1/L5 Band or Wider Freq 800MHz to 2.8GHz in 3U VPX

Octal RF transceiver utilizing AD9371 and/or AD9375
Xilinx UltraScale+ XCZU15EG FPGA
8 GB of 64-bit wide DDR-4 Memory with ECC to ARM
8 GB of 64-bit wide DDR-4 Memory to FPGA
MPSoC with block RAM and UltraRAM
L1/L5 Band Filter and Amplifier with option for 800MHz to 2.8GHz input without Filters
Health Management through dedicated Processor

View product VPX582 Data Sheet

VPX572

Dual ADC 12-bit @ 6.4 GSPS or Quad ADC @ 3.2 GSPS Virtex UltraScale+, 3U VPX

Dual ADC 12-bit @ 6.4 GSPS (ADC12DJ3200) or Quad ADC @ 3.2 GSPS
Health Management through dedicated Processor

View product VPX572 Data Sheet

VPX573

NEW

Dual Narrow-Band and Wideband RF Transceiver in 3U VPX

Single Analog Device ADRV9002
- 2 x 2 highly integrated transceivers
- Frequency range of 30Mhz to 6GHz
- TX/RX bandwidth from 12KHz to 40MHz
Xilinx UltraScale+ XCZU15EG FPGA
- MPSoC with block RAM and UltraRAM
8 GB of 64-bit wide DDR-4 Memory with ECC to PS
4x Ethernet, GPIO (LVDS and single ended)
5x RS-422 (RX/TX), Dual RS-232 and I/O
VITA 67.2 for RF interface
Total-Elapsed-Time Recorder
Health Management through dedicated Processor
- Tier two support

View product VPX573 Data Sheet

VPX589

Dual ADC @ 10.4 or 6.4 GSPS and Dual DAC @ 12 GSPS, Virtex UltraScale+™, 3U VPX

Xilinx Virtex UltraScale+™ XCVU13P FPGA
Dual ADC 12-bit @ 10.4/6.4 GSPS or quad ADC @ 5.2/3.2 GSPS with TI ADC12DJ5200 or ADC12DJ3200
Option for ADC12DJ5200, ADC12DJ3200 or ADC12DJ2700
Dual DAC 16-bit @ 12 GSPS (AD9162 or AD9164)
16 SERDES as PCIe/SRIO/10GbE/40GbE/Aurora to P1
8 SERDES as PCIe/SRIO/10GbE/40GbE/Aurora to P2
Clock Jitter cleaner
Option for Direct RF Clock sampling for the ADC/DAC
Single bank of DDR4 64-bit wide 8 GB Total
Health Management through dedicated Processor

View product VPX589 Data Sheet

VPX588

Quad ADC @ 3 GSPS with Quad DAC @ 12 GSPS, Virtex UltraScale+™, 3U VPX

Xilinx UltraScale+™ XCVU13P FPGA
Quad ADC 14-bit @ 3 GSPS (AD9208)
Quad DAC 16-bit @ 12 GSPS (AD9162 or AD9164)
Single bank of DDR4 64-bit wide 8 GB Total
16 SERDES as PCIe/SRIO/10GbE/40GbE/Aurora to P1
8 SERDES as PCIe/SRIO/10GbE/40GbE/Aurora to P2
Clock Jitter cleaner
Option for Direct RF Clock sampling for the ADC/DAC
Health Management through dedicated Processor

View product VPX588 Data Sheet

VPX597

300 MHz to 6 GHz Octal Versatile Wideband Transceiver (MIMO), Kintex UltraScale™, 3U VPX

Xilinx Kintex UltraScale™ XCKU115 FPGA
Four AD9371s or AD9375s on one module
Octo complete transceiver signal chain solution
Tx synthesis bandwidth to 250 MHz
Rx bandwidth: 8 MHz to 100 MHz
Health Management through dedicated Processor

View product VPX597 Data Sheet

MPM_VPX570

Development Accelerator “Multi-Path Modulation” Software Package

Loopback pipeline ADC-DAC
Quadrature Generator
Multi-Path with N independent branches
N independent variable delays and gain
N independent Phase and Amplitude modulators
Combiner for N branches
MATLAB® model included

View product MPM_VPX570 Data Sheet

VPX571

Dual RF Agile Transceiver with VITA 67.2 RF Connector, 3U VPX

Dual RF transceiver (AD9364)
Xilinx UltraScale+ XCZU15EG FPGA
8 GB of 64-bit wide DDR4 Memory (single bank) with ECC
MPSoC with block RAM and UltraRAM
RF routed as option to VITA 67.2
Health Management through dedicated Processor

View product VPX571 Data Sheet

VPX599

Dual ADC @ 10.4 or 6.4 GSPS and Dual DAC @ 12 GSPS, UltraScale™, 3U VPX

3U FPGA Dual ADC and Dual DAC per VITA 46
Xilinx Kintex UltraScale™ XCKU115 FPGA
Dual ADC 12-bit @ 10.4/6.4 GSPS or quad ADC @ 5.2/3.2 GSPS with TI ADC12DJ5200 or ADC12DJ3200
Option for ADC12DJ5200, ADC12DJ3200 or ADC12DJ2700
Dual DAC 16-bit @ 12 GSPS (AD9162 or AD9164) or TI DAC38RF82 14-bit @ 9GSPS
High-performance clock jitter cleaner
VHDL reference design with source code
Protocols such as PCIe, SRIO, 10GbE/40GbE, etc. are FPGA programmable
16 GB of DDR4 Memory (64-bit wide)
Health Management through dedicated Processor

View product VPX599 Data Sheet

VPX570

ADC 12-bit @ 5.4 GSPS and DAC 12-bit @ 6 GSPS, Virtex UltraScale+, 3U VPX

ADC 12-bit @ 5.4 GSPS (EV12AS350A)
DAC 12-bit @ 6 GSPS (EV12DS460A)
RF switch to loop the DAC to ADC
Xilinx UltraScale+ XCVU13P FPGA with 8 GB DDR4
Supported by development accelerator software package for Multi-Path Modulation
Health Management through dedicated Processor

View product VPX570 Data Sheet

VPX598

Quad DAC @ 12 GSPS with Quad ADC @ 3 GSPS, Kintex UltraScale™, 3U VPX

3U FPGA Quad DAC and Quad ADC per VITA 46
Xilinx Kintex UltraScale™ XCKU115 FPGA
Quad ADC channels (AD9208) 14-bits @ 3 GSPS
Quad DAC channels (AD9162 or AD9164) 16-bits @ 12 GSPS
Two banks of 64-bit wide DDR4 for a total of 16 GB
Health Management through dedicated Processor

View product VPX598 Data Sheet

VPX574

Dual RF Agile Transceiver with Front I/O, 3U VPX

Dual RF transceiver (AD9364)
Xilinx UltraScale+ XCZU15EG FPGA
8 GB of 64-bit wide DDR4 Memory (single bank) with ECC
MPSoC with block RAM and UltraRAM
Health Management through dedicated Processor

View product VPX574 Data Sheet

VPX576

Virtex UltraScale+ FPGA with Octal ADC/DAC in 6U VPX

Xilinx XCVU13P UltraScale+
Two banks of DDR4 Memory 16GB totalo
- Single Bank of 64-bit wide 8G
- Bo Single Bank of 32-bit wide 4GB
Four QSFP28 (4x 100GbE)
Dual Analog Device AD9081o 8 ADC/DAC fully synchronizedo Direct RF CLK
Xilinx Zynq UltraScale+ XCZU04CG
8GB of DDR4 with ECC
64GB of SSD
Health Management through dedicated Processor

View product VPX576 Data Sheet

VPX578

3rd Generation Zynq RFSoC UltraScale+, 6U VPX

3rd Generation Xilinx RFSoC XCZU47DR
8 ADC and 8 DAC simultaneous processing
Suitable for 5G/4G/LTE and SDR deployment
8GBytes of DDR-4 with ECC to PS
8GBytes of DDR-4 to PL
MPSoC with block RAM and UltraRAM
64G SATA NANDrive
32 GPIO, 20 LVDS and 4x RS-485
Health Management through dedicated Processor

View product VPX578 Data Sheet

VPX579

3rd Generation Zynq RFSoC UltraScale+, 6U VPX

3rd Generation Xilinx RFSoC XCZU49DR
16 ADC and 16 DAC simultaneous processing
Suitable for 5G/4G/LTE and SDR deployment
8GBytes of DDR-4 with ECC to PS
8GBytes of DDR-4 to PL
MPSoC with block RAM and UltraRAM• 64G SATA NANDrive
32 GPIO, 20 LVDS and 4x RS-485
Health Management through dedicated Processor

View product VPX579 Data Sheet

VPX584

Four ADC 12-bit @ 10.25 GSPS with UltraScale+, 3U VPX

Four ADC 12-bit @ 10.25 GSPS
Utilizing Analog Device AD9213
Xilinx UltraScale+ XCVU13P FPGA
High speed SERDES to the P1/P2
Dual 64-bit wide bank of DDR4 with a total of 16GB
Supported by development accelerator software
Health Management through dedicated Processor

View product VPX584 Data Sheet

VPX FPGA A/D D/A

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